[PATCH] D141043: [AArch64][SVE] Avoid AND operation if both side are splat of i1 or PTRUE

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16217-16223
+static bool isAllInactivePredicate(SDValue N) {
+  // Look through cast.
+  while (N.getOpcode() == AArch64ISD::REINTERPRET_CAST)
+    N = N.getOperand(0);
+
+  return ISD::isConstantSplatVectorAllZeros(N.getNode());
+}
----------------
`isAllInactivePredicate` is unused now?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16225
+
+static bool isAllActivePredicate(SelectionDAG &DAG, SDValue N) {
+  unsigned NumElts = N.getValueType().getVectorMinNumElements();
----------------
Can you commit the moving of this function as a non-functional change (as a precursory patch)?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16312-16315
+  if (isAllActivePredicate(DAG, Src))
+    return N->getOperand(1);
+  if (isAllActivePredicate(DAG, N->getOperand(1)))
+    return Src;
----------------
nit: can you replace Src with `N->getOperand(0)` here? It's equivalent, but it makes it a bit more intuitive to understand.


================
Comment at: llvm/test/CodeGen/AArch64/sve-splat-one-and-ptrue.ll:40
+; CHECK-NEXT:    ptrue p1.d
+; CHECK-NEXT:    ptrue p2.s
+; CHECK-NEXT:    and p0.b, p0/z, p0.b, p1.b
----------------
I would have expected all ptrues to have folded away and to only have:

  ptrue p0.s

Why are these AND instructions not removed?


================
Comment at: llvm/test/CodeGen/AArch64/sve-splat-one-and-ptrue.ll:45
+entry:
+  %0 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)
+  %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %0)
----------------
nit: you can remove `tail` for these function calls.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141043/new/

https://reviews.llvm.org/D141043