[PATCH] D141064: [AArch64] Comprehensive tests for atomic operations

[Tomas Matheson via Phabricator via llvm-commits]

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There are a lot of variants of atomic operations, and AArch64 has several
distinct options to codegen them, and does different things depending on
available features, architecture version and optimisation level. The current
testing for atomic operations has been added gradually over time and does not
give full coverate.  Given how complex the codegen for atomic operations is, it
is valuable to cover the entire parameter space, i.e. test them all. The
resulting set of tests serve also as a reference for how each is codegened.

In order to keep the test files readable and avoid constant updating for
unrelated codegen changes, the test outputs are filtered to only include the
relevant instructions. This shows for each operation and feature which codegen
approach is taken (e.g. ll/sc loop, atomic instruction, library call).

The following parameter space is tested:

- feature: +lse, +rcpc, etc
- optimisation level: O0, O1 <https://reviews.llvm.org/owners/package/1/> (covers GISel and SelectionDAG)
- atomic instruction: load, store, cmpxchg, atomirmw*
- size: i8, i16, i32, i64, i128
- aligned/unaligned accesses
- endianness: big, little
- atomic ordering: release, acquire, etc
- load atomic only: const/non-const
- cmpxchg only: weak/strong
- atomicrmw: update operation (add, sub, etc)

Notably not covered:

- volatility: there should be no difference between volatile/non-volatile
- atomicrmw fadd/fsub

The files are split by triple, LLVM instruction, and feature. This makes it
easy to diff between features and endianness for a given instruction.

The file that generates the tests is included.

There are 70 test files with an average of 2800 lines each.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141064

Files:
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-fence.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-fence.ll
  llvm/test/CodeGen/AArch64/Atomics/generate-tests.py