[PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai updated this revision to Diff 485047.
HsiangKai added a comment.

No need to check RmReassoc and FmNsz for fmin/fmax.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140602/new/

https://reviews.llvm.org/D140602

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/test/CodeGen/RISCV/machine-combiner.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D140602.485047.patch
Type: text/x-patch
Size: 4381 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221223/670cce1f/attachment.bin>