[PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 22 20:51:58 PST 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1383
- if (isFADD(Opc) || isFMUL(Opc))
+ if (isFADD(Opc) || isFMUL(Opc) || isFMIN(Opc) || isFMAX(Opc))
return Inst.getFlag(MachineInstr::MIFlag::FmReassoc) &&
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I don't think FMIN/FMAX require Reassoc or FmNsz
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140602/new/
https://reviews.llvm.org/D140602
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