[PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around

Ayke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 22 11:16:09 PST 2022


aykevl created this revision.
aykevl added reviewers: dylanmckay, benshi001.
Herald added subscribers: Jim, hiraditya.
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aykevl requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch optimizes 32-bit constant shifts by renaming registers. This
is very effective as the compiler would otherwise need to do a lot of
single bit shift instructions. Instead, the registers are renamed at the
SSA level which means the register allocator will insert the necessary
mov instructions.

Unfortunately, the register allocator will insert some unnecessary movs
with the current code. This will be fixed in a later patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140570

Files:
  llvm/lib/Target/AVR/AVRISelLowering.cpp
  llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
  llvm/test/CodeGen/AVR/div.ll
  llvm/test/CodeGen/AVR/rem.ll
  llvm/test/CodeGen/AVR/return.ll
  llvm/test/CodeGen/AVR/shift32.ll

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