[PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 23 03:19:51 PST 2022
benshi001 added inline comments.
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1867
+ // Continue shifts with the leftover registers.
+ Regs = Regs.drop_back(1);
+
----------------
I am a bit confused about here,
`std::pair(Out, 0)` is first put to the tail, then is dropped by `drop_back(1)` ?
In the first round of this loop, `Regs` comes in with `size==4`, then in the next round, `Regs` only keeps 3 elements before the moves?
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1897
+ // Continue shifts with the leftover registers.
+ Regs = Regs.drop_front(1);
+
----------------
I am also confused by here as your did for the left shift, the `std::pair(ShrExtendReg, 0)` is put at the head of `Regs`, and then dropped by `drop_front(1)` ? Is it necessary to create a temporary copy of `Regs` ?
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140570/new/
https://reviews.llvm.org/D140570
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