[PATCH] D139965: [RISCV] Add a bit to TSFlags to mark SignExtendingOpW instructions for SExtWRemoval.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 14 11:15:41 PST 2022
reames added a comment.
Just curious, what was the motivation here? The resulting code appears much less clear to me.
If this was a compile time issue, did you consider using e.g. a denseset membership test instead?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139965/new/
https://reviews.llvm.org/D139965
More information about the llvm-commits
mailing list