[PATCH] D139965: [RISCV] Add a bit to TSFlags to mark SignExtendingOpW instructions for SExtWRemoval.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D139965#3995784 <https://reviews.llvm.org/D139965#3995784>, @reames wrote:

> Just curious, what was the motivation here?  The resulting code appears much less clear to me.
>
> If this was a compile time issue, did you consider using e.g. a denseset membership test instead?

I figured W instructions were such a common property of RISC-V that it made sense to declare them at the instruction declaration rather than maintaining them in an adhoc list. Do you think the whole thing is less clear or the ones that aren't really W instructions?


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