[PATCH] D139925: [AArch64] Add new v9.4-A PM pstate system register

[Sam Elliott via Phabricator via llvm-commits]

lenary added a comment.

We likely have to release-note this change, as we are now are:

- not going to error for assembly where upper bits which do nothing are set in the immediate
- may codegen e.g. `__arm_wsr64("uao", 2)` to the assembly `msr uao, 2` which is not accepted by binutils.

Both of these are intentional changes, though.

Also a nit about testing.



================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:1793
+  let DecoderMethod = "DecodeSystemPStateImm0_1Instruction";
   // MSRpstateI aliases with MSRI. When the MSRpstateI decoder method returns
   // Fail the decoder should attempt to decode the instruction as MSRI.
----------------
Do we have decoding tests for the case where you fallback from `MSRpstateImm0_15` to `MSRpstateImm0_1` to `MSRI`? This would presumably be a test where we use an unallocated MSR (imm) encoding?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139925/new/

https://reviews.llvm.org/D139925