[PATCH] D139925: [AArch64] Add new v9.4-A PM pstate system register

Lucas Prates via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 13 06:18:34 PST 2022


pratlucas added a comment.

Indeed. I'll add an entry to the release notes to capture that.



================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:1793
+  let DecoderMethod = "DecodeSystemPStateImm0_1Instruction";
   // MSRpstateI aliases with MSRI. When the MSRpstateI decoder method returns
   // Fail the decoder should attempt to decode the instruction as MSRI.
----------------
lenary wrote:
> Do we have decoding tests for the case where you fallback from `MSRpstateImm0_15` to `MSRpstateImm0_1` to `MSRI`? This would presumably be a test where we use an unallocated MSR (imm) encoding?
The fallback applies every time the decoder method fails due to the lack of the required feature for a particular pstate register.
This is currently covered by the negative tests for `PAN`, `UAO`, `DIT`, `SSBS`, and `TCO`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139925/new/

https://reviews.llvm.org/D139925



More information about the llvm-commits mailing list