[PATCH] D139925: [AArch64] Add new v9.4-A PM pstate system register

[Lucas Prates via Phabricator via llvm-commits]

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This adds support for the new PM pstate system register introduced by
the v9.4-A Exception-based Event Profiling extension (FEAT_EBEP).

There are currently two variants of pstate setting MSR instructions,
taking 4-bit and 1-bit immediate operands. So far only one pstate
register would take a 1-bit operand (ALLINT), which made it possible for
our tablegen backend to handle that by fixing the high Crm bits to
0b000, but the new PM pstate register requires different values to be
specified for those bits.

To enable that, this patch creates an explicit separation between the
pstate system registers that take 4-bit and 1-bit immediate operands,
allowing each entry to specify the value for the 3 high bits of the Crm
field.

More information about this extension and the new register can be found
at:

- https://developer.arm.com/documentation/ddi0601/2022-09/AArch64-Registers/PM--PMU-Exception-Mask

Contributors:

- Lucas Prates
- Sam Elliott


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139925

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64SystemOperands.td
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
  llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
  llvm/test/MC/AArch64/armv8.1a-pan.s
  llvm/test/MC/AArch64/armv8.2a-uao.s
  llvm/test/MC/AArch64/armv8.4a-dit.s
  llvm/test/MC/AArch64/armv8.5a-ssbs-error.s
  llvm/test/MC/AArch64/armv9.4a-ebep-error.s
  llvm/test/MC/AArch64/armv9.4a-ebep.s
  llvm/test/MC/Disassembler/AArch64/armv8.1a-pan.txt
  llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
  llvm/test/MC/Disassembler/AArch64/armv9.4a-ebep.txt

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