[PATCH] D138529: [AVR] Optimize constant 32-bit shifts

[Ben Shi via Phabricator via llvm-commits]

benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1949
+      } else if (Idx == -1) {
+        Regs[I] = std::pair(Ext, 0);
+      } else {
----------------
`Ext` and `ExtMore` seem confusing. May it be better that

`Ext`     -> `HighByte`
`ExtMore` -> `ExtByte`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138529/new/

https://reviews.llvm.org/D138529