[PATCH] D139442: AMDGPU/MC: Make VReg and VISrc decoders more strict

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added a comment.

By design, disassembler should be able to decode invalid code when possible. It is much more helpful for the user to see something like this:

  v_wmma_f32_16x16x16_f16  … s[0:7], …

or

  v_wmma_f32_16x16x16_f16  … /*invalid immediate*/, …

than this:

  warning: invalid instruction encoding

Would it be possible to modify your patch and decode invalid operands with a comment stating that they are incorrect?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139442/new/

https://reviews.llvm.org/D139442