[PATCH] D139411: [AAch64] Optimize muls with operands having enough zero bits.

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 6 03:51:12 PST 2022


david-arm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll:908
+
+define i64 @umull_ldrb_h(i8* %x0, i16 %x1) {
+; CHECK-LABEL: umull_ldrb_h:
----------------
Perhaps it's worth pre-committing these tests so that we can see what's changed? It's not immediately obvious from the patch what effect the changes have that's all.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139411/new/

https://reviews.llvm.org/D139411



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