[PATCH] D138529: [AVR] Optimize constant 32-bit shifts
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 6 00:36:57 PST 2022
benshi001 added inline comments.
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1855
+ // then move registers around to get the correct end result.
+ if (ShiftAmt < 0 && (-ShiftAmt % 8) >= 6) {
+ // Left shift modulo 6 or 7.
----------------
Would it be better to split this large function `insertMultibyteShift` to small ones for each `if` statment ? for example, this `if` can be a standalone function `insertMultibyteShiftMod6_7` (or any better name).
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D138529/new/
https://reviews.llvm.org/D138529
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