[PATCH] D139272: [RISCV]Keep (select c, 0/-1, X) during PerformDAGCombine

Liao Chunyu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 5 01:25:53 PST 2022


liaolucy marked an inline comment as done.
liaolucy added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/select-binop-identity.ll:36
+; SFB64-NEXT:  # %bb.1:
+; SFB64-NEXT:    mv a1, a2
+; SFB64-NEXT:  .LBB0_2:
----------------
There is an extra instruction here, which seems to be caused by PseudoCCMOVGPR. I'll debug it more carefully, maybe a new patch is needed.


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