[PATCH] D139272: [RISCV]Keep (select c, 0/-1, X) during PerformDAGCombine

[Liao Chunyu via Phabricator via llvm-commits]

liaolucy updated this revision to Diff 480011.
liaolucy retitled this revision from "Branchless optimization for select instructions" to "[RISCV]Keep (select c, 0/-1, X) during PerformDAGCombine".
liaolucy edited the summary of this revision.
liaolucy added a comment.
Herald added subscribers: sunshaoce, eopXD, VincentWu, vkmr, evandro, benna, psnobl, shiva0217, kito-cheng.

add new RUN lines with -mcpu=sifive-u74

Try to add more optimization details


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139272/new/

https://reviews.llvm.org/D139272

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/select-binop-identity.ll

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