[PATCH] D138876: [RISCV] Share code for fixed offsets adjustRegs (thus materializing fewer constants)

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 28 16:05:49 PST 2022


jrtc27 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:301
+  RI.adjustReg(MBB, MBBI, DL, DestReg, SrcReg, Val, Flag,
+               getStackAlign(), false);
 }
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`/*...=*/`?


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:170
+                                  MaybeAlign RequiredAlign,
+                                  bool SrcRegIsKill) const {
   const uint64_t Align = RequiredAlign.valueOrOne().value();
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Name doesn't match the header


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138876/new/

https://reviews.llvm.org/D138876



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