[PATCH] D138813: [AArch64] implement GPR (U/S)(MIN/MAX) instruction SDag support

[Ties Stuij via Phabricator via llvm-commits]

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Using SelectionDag, lower umin, umax, smin, smax intrinsics to corresponding
UMIN, UMAX, SMIN, SMAX instructions when feat CSSC is available.

See specs for corresponding immediate and register versions in:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138813

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/min-max.ll

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