[PATCH] D138570: [AArch64] Add patterns for SVE predicated add/sub and mov combine

[Nicola Lancellotti via Phabricator via llvm-commits]

NicolaLancellotti added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3137
+let Predicates = [HasSVE] in {
+  def : Pat<(nxv16i8 (add ZPR:$op, (zext (nxv16i1 PPR:$pred)))),
+            (ADD_ZPmZ_B PPR:$pred, ZPR:$op, (DUP_ZI_B 1, 0))>;
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paulwalker-arm wrote:
> Given the previous work that did land, do these patterns ever match? I mean we shouldn't have any `zext` of predicate vectors by this point should we? Or do you plan to revert that patch once this lands.
> Given the previous work that did land, do these patterns ever match? I mean we shouldn't have any `zext` of predicate vectors by this point should we? Or do you plan to revert that patch once this lands.

These zext patterns are added in case we want to revert the "Canonicalize ZERO_EXTEND to VSELECT" patch, otherwise, we don't need them.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138570/new/

https://reviews.llvm.org/D138570