[PATCH] D138242: [RISCV] Use register allocation hints to improve use of compressed instructions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:416
+
+  for (auto &Use : MRI->reg_nodbg_instructions(VirtReg)) {
+    if (isCompressible(Use)) {
----------------
reames wrote:
> I believe Use is actually User here.  
I'm going to use `MI`. It's just an instruction that has the register as an operand either as a Def or a Use.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138242/new/

https://reviews.llvm.org/D138242