[PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.

[Amy Kwan via Phabricator via llvm-commits]

amyk added a comment.

Nit: Please also rebase this patch as the newly added files have been committed in Stefan's patch: rG9df924a634ac5ea702b0d8d0d8b737c819a98095 <https://reviews.llvm.org/rG9df924a634ac5ea702b0d8d0d8b737c819a98095>



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Comment at: llvm/lib/Target/PowerPC/PPCInstrFuture.td:14
+
+let Predicates = [HasVSX, IsISAFuture] in {
+def LXVRL : XX1Form_memOp<31, 525, (outs vsrc:$XT), (ins memr:$src, g8rc:$rB),
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I might be mistaken but I think we may need a `let mayLoad = 1 in { }` for the loads and a `let mayStore = 1 in { }` for the stores. 


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Comment at: llvm/lib/Target/PowerPC/PPCInstrFuture.td:16
+def LXVRL : XX1Form_memOp<31, 525, (outs vsrc:$XT), (ins memr:$src, g8rc:$rB),
+                         "lxvrl $XT, $src, $rB", IIC_LdStLoad, []>;
+
----------------
stefanp wrote:
> nit: 
> I think alignment is 1 space off here. (and on line 19).
Minor nit on indenting.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrFuture.td:19
+def LXVRLL : XX1Form_memOp<31, 557, (outs vsrc:$XT), (ins memr:$src, g8rc:$rB),
+                          "lxvrll $XT, $src, $rB", IIC_LdStLoad, []>;
+
----------------
Minor nit on indenting.


Repository:
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  https://reviews.llvm.org/D136992/new/

https://reviews.llvm.org/D136992