[PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp accepted this revision.
stefanp added a comment.
This revision is now accepted and ready to land.

Other than a very minor nit I think this LGTM.

Please note that since https://reviews.llvm.org/D136366 has gone in I suspect you will have to rebase your patch to the top of main branch before you deliver this change.



================
Comment at: llvm/lib/Target/PowerPC/PPCInstrFuture.td:16
+def LXVRL : XX1Form_memOp<31, 525, (outs vsrc:$XT), (ins memr:$src, g8rc:$rB),
+                         "lxvrl $XT, $src, $rB", IIC_LdStLoad, []>;
+
----------------
nit: 
I think alignment is 1 space off here. (and on line 19).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136992/new/

https://reviews.llvm.org/D136992