[PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.

[Lei Huang via Phabricator via llvm-commits]

lei added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrFuture.td:14
+
+let Predicates = [HasVSX, IsISAFuture] in {
+def LXVRL : XX1Form_memOp<31, 525, (outs vsrc:$XT), (ins memr:$src, g8rc:$rB),
----------------
amyk wrote:
> I might be mistaken but I think we may need a `let mayLoad = 1 in { }` for the loads and a `let mayStore = 1 in { }` for the stores. 
I second that. We should add it for load and stores instrs.


================
Comment at: llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s:6
+# RUN: llvm-mc -triple powerpc-unknown-aix-gnu --show-encoding %s | \
+# RUN:   FileCheck -check-prefix=CHECK-BE %s
+
----------------
run line for `powerpc64-unknown-aix-gnu`?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D136992/new/

https://reviews.llvm.org/D136992