[PATCH] D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 21 07:51:48 PDT 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:893
+// out in the test.
+// Skipped pattern: Dst MI def isn't a register class(COPY:{ *:[i64] } ?:{ *:[i1] }:$src)
def : Pat <
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Pierre-vh wrote:
> Help needed here, not sure how to get this one to work. I tried a lot of things, including COPY_TO_REGCLASS and nothing seems to do the trick.
> Due to the simplicity of the pattern I'm wondering if it isn't better to just do it manually in the InstructionSelector rather than fight the GISel TableGen emitter?
What's the error with COPY_TO_REGCLASS?
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https://reviews.llvm.org/D136448/new/
https://reviews.llvm.org/D136448
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