[PATCH] D136396: [X86] Enable reassociation for ADD instructions

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/X86/reassociate-add.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 < %s | FileCheck %s
+
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Drop -mcpu=x86-64

Pre-commit these test with current codegen to trunk and rebase to show the patch diffs.


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Comment at: llvm/test/CodeGen/X86/reassociate-add.ll:4
+
+; This file checks the reassociation of ADD instruction.
+; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence
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pengfei wrote:
> No idea if we intended to not do reassociation in ADD instructions. 
> Is there problem when unexpected overflow/underflow may be generated during reassociation?
Not that I can think of - EFLAGS will be the same and we already handles the $dst=$src0 constraint


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Comment at: llvm/test/CodeGen/X86/xmulo.ll:1871
 ; WIN32-NEXT:    setne %al
-; WIN32-NEXT:    addl $12, %esp
+; WIN32-NEXT:    addl $16, %esp
 ; WIN32-NEXT:    popl %esi
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Annoying - normally I'd expect reassociation to help us reduce stack use


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136396/new/

https://reviews.llvm.org/D136396