[PATCH] D136396: [X86] Enable reassociation for ADD instructions
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 20 23:56:26 PDT 2022
pengfei added inline comments.
================
Comment at: llvm/test/CodeGen/X86/reassociate-add.ll:4
+
+; This file checks the reassociation of ADD instruction.
+; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence
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No idea if we intended to not do reassociation in ADD instructions.
Is there problem when unexpected overflow/underflow may be generated during reassociation?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136396/new/
https://reviews.llvm.org/D136396
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