[PATCH] D136396: [X86] Enable reassociation for ADD instructions

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: llvm/test/CodeGen/X86/reassociate-add.ll:4
+
+; This file checks the reassociation of ADD instruction.
+; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence
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RKSimon wrote:
> pengfei wrote:
> > No idea if we intended to not do reassociation in ADD instructions. 
> > Is there problem when unexpected overflow/underflow may be generated during reassociation?
> Not that I can think of - EFLAGS will be the same and we already handles the $dst=$src0 constraint
I was working on this a long time ago (~2015), so it's hard to remember exactly, but I don't think there was a fundamental reason to exclude integer ADD. 

It just seemed like it did not have much potential gain with the limited register set and could interfere with other transforms like LEA formation. 

If there's evidence that this improves something (and doesn't cause regressions), then it should be ok.


Repository:
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  https://reviews.llvm.org/D136396/new/

https://reviews.llvm.org/D136396