[PATCH] D136136: [RISCV] Lower VECTOR_SHUFFLE to VSLIDEDOWN_VL.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2901
+  // V1 and V2 are continuous.
+  if (V1.getConstantOperandVal(1) +
+          V1.getSimpleValueType().getVectorNumElements() !=
----------------
I don’t think it’s enough to be contiguous. The first index must be 0. If it’s not you won’t extract the correct subvector at the end.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D136136/new/

https://reviews.llvm.org/D136136