[PATCH] D135941: [X86] Support AMX-FP16

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 13 22:44:21 PDT 2022


pengfei added inline comments.


================
Comment at: clang/test/CodeGen/amx_fp16.c:7
+#include <stddef.h>
+// FP16
+void test_tile_dpfp16ps(void) {
----------------
Remove


================
Comment at: clang/test/CodeGen/amx_fp16_errors.c:7
+
+// FP16
+void test_tile_dpfp16ps() {
----------------
Remove


================
Comment at: llvm/lib/Support/X86TargetParser.cpp:585
+static constexpr FeatureBitset ImpliedFeaturesAMX_FP16 = FeatureAMX_TILE |
+    FeatureAVX512FP16;
 static constexpr FeatureBitset ImpliedFeaturesAVX512FP16 =
----------------
It should not relate to AVX512FP16.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36783-36784
+    switch (MI.getOpcode()) {
+    default: llvm_unreachable("Unexpected instruction!");
+    case X86::PTDPFP16PS: Opc = X86::TDPFP16PS; break;
+    }
----------------
Format the code?


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:1
+; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+amx-tile,+amx-bf16,+amx-int8,+amx-fp16 | FileCheck %s
+
----------------
Maybe auto gen it?


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:1
+; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+amx-tile,+amx-bf16,+amx-int8,+amx-fp16 | FileCheck %s
+
----------------
pengfei wrote:
> Maybe auto gen it?
Why need `+avx512f`


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:1
+; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+amx-tile,+amx-bf16,+amx-int8,+amx-fp16 | FileCheck %s
+
----------------
pengfei wrote:
> pengfei wrote:
> > Maybe auto gen it?
> Why need `+avx512f`
Why need `-O0`?


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:5
+; CHECK:       # %bb.0:
+; amx-fp16
+; CHECK:    tdpfp16ps       %tmm1, %tmm2, %tmm3
----------------
The comment seems meaningless.


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:9-10
+define void @test_amx() {
+; amx-avx512
+; amx-fp16
+call void @llvm.x86.tdpfp16ps(i8 3, i8 2, i8 1)
----------------
ditto here.


================
Comment at: llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll:15-16
+}
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; amx-fp16
+declare void @llvm.x86.tdpfp16ps(i8 %tile3, i8 %tile2, i8 %tile1)
----------------
ditto here.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135941/new/

https://reviews.llvm.org/D135941



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