[PATCH] D135264: [MachineCombiner][RISCV] Enable MachineCombiner for RISCV

[Anton Sidorenko via Phabricator via llvm-commits]

asi-sc updated this revision to Diff 466824.
asi-sc added a comment.

Move FRM operands creation from setSpecialOperandAttr to finalizeInsInstrs


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135264/new/

https://reviews.llvm.org/D135264

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O3-pipeline.ll
  llvm/test/CodeGen/RISCV/machine-combiner-mir.ll
  llvm/test/CodeGen/RISCV/machine-combiner.ll

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