[PATCH] D135264: [MachineCombiner][RISCV] Enable MachineCombiner for RISCV

[Anton Sidorenko via Phabricator via llvm-commits]

asi-sc added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1164
+  }
+}
+
----------------
craig.topper wrote:
> Should we intersect the MIFlags too like X86 and PowerPC do? Not sure where AArch64 doesn't.
Thanks for drawing my attention to this. I think we should. As an improvement we can think of propagating some fast-math flags from the root instruction, but not in this patch.
I added flags intersection and two test cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135264/new/

https://reviews.llvm.org/D135264