[PATCH] D135512: [AArch64][Windows] Check sret attribute also for inreg attribute

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 created this revision.
bcl5980 added reviewers: efriedma, DavidSpickett, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.
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Fix the issue: #57684


https://reviews.llvm.org/D135512

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/aarch64-windows-inreg-without-sret.ll


Index: llvm/test/CodeGen/AArch64/aarch64-windows-inreg-without-sret.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/aarch64-windows-inreg-without-sret.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-pc-windows-msvc"
+
+define i64 @foobar(i64* inreg %0) {
+; CHECK-LABEL: foobar:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ldr x0, [x0]
+; CHECK-NEXT:    ret
+entry:
+  %1 = load i64, i64* %0
+  ret i64 %1
+}
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6294,7 +6294,7 @@
   // epilogue.
   if (IsWin64) {
     for (unsigned I = 0, E = Ins.size(); I != E; ++I) {
-      if (Ins[I].Flags.isInReg()) {
+      if (Ins[I].Flags.isInReg() && Ins[I].Flags.isSRet()) {
         assert(!FuncInfo->getSRetReturnReg());
 
         MVT PtrTy = getPointerTy(DAG.getDataLayout());


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