[llvm] 9d31d1c - [ConstraintElimination] Use logic from 3771310eed for queries only.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-10-08T11:03:45+01:00
New Revision: 9d31d1c214e0f010fbb12ecb1780ac27dab6e435

URL: https://github.com/llvm/llvm-project/commit/9d31d1c214e0f010fbb12ecb1780ac27dab6e435
DIFF: https://github.com/llvm/llvm-project/commit/9d31d1c214e0f010fbb12ecb1780ac27dab6e435.diff

LOG: [ConstraintElimination] Use logic from 3771310eed for queries only.

The logic added in 3771310eed was placed sub-optimally. Applying the
transform in ::getConstraint meant that it would also impact conditions
that are added to the system by the signed <-> unsigned transfer logic.

This meant we failed to add some signed facts to the signed system. To
make sure we still add as many useful facts to the signed/unsigned
systems, move the logic to the point where we query the system.

Added: 
    

Modified: 
    llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    llvm/test/Transforms/ConstraintElimination/signed-query-unsigned-system.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 5feab3b56d7f4..2402802cfadcc 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -111,11 +111,7 @@ class ConstraintInfo {
   ConstraintSystem UnsignedCS;
   ConstraintSystem SignedCS;
 
-  const DataLayout &DL;
-
 public:
-  ConstraintInfo(const DataLayout &DL) : DL(DL) {}
-
   DenseMap<Value *, unsigned> &getValue2Index(bool Signed) {
     return Signed ? SignedValue2Index : UnsignedValue2Index;
   }
@@ -331,14 +327,6 @@ ConstraintInfo::getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
       Pred != CmpInst::ICMP_SLE && Pred != CmpInst::ICMP_SLT)
     return {};
 
-  // If both operands are known to be non-negative, change signed predicates to
-  // unsigned ones. This increases the reasoning effectiveness in combination
-  // with the signed <-> unsigned transfer logic.
-  if (CmpInst::isSigned(Pred) &&
-      isKnownNonNegative(Op0, DL, /*Depth=*/MaxAnalysisRecursionDepth - 1) &&
-      isKnownNonNegative(Op1, DL, /*Depth=*/MaxAnalysisRecursionDepth - 1))
-    Pred = CmpInst::getUnsignedPredicate(Pred);
-
   SmallVector<PreconditionTy, 4> Preconditions;
   bool IsSigned = CmpInst::isSigned(Pred);
   auto &Value2Index = getValue2Index(IsSigned);
@@ -754,7 +742,7 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT) {
   bool Changed = false;
   DT.updateDFSNumbers();
 
-  ConstraintInfo Info(F.getParent()->getDataLayout());
+  ConstraintInfo Info;
   State S(DT);
 
   // First, collect conditions implied by branches and blocks with their
@@ -837,7 +825,22 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT) {
 
         LLVM_DEBUG(dbgs() << "Checking " << *Cmp << "\n");
         SmallVector<Value *> NewVariables;
-        auto R = Info.getConstraint(Cmp, NewVariables);
+        CmpInst::Predicate Pred = Cmp->getPredicate();
+        Value *A = Cmp->getOperand(0);
+        Value *B = Cmp->getOperand(1);
+        const DataLayout &DL = Cmp->getModule()->getDataLayout();
+
+        // If both operands are known to be non-negative, change signed
+        // predicates to unsigned ones. This increases the reasoning
+        // effectiveness in combination with the signed <-> unsigned transfer
+        // logic.
+        if (CmpInst::isSigned(Pred) &&
+            isKnownNonNegative(A, DL,
+                               /*Depth=*/MaxAnalysisRecursionDepth - 1) &&
+            isKnownNonNegative(B, DL, /*Depth=*/MaxAnalysisRecursionDepth - 1))
+          Pred = CmpInst::getUnsignedPredicate(Pred);
+
+        auto R = Info.getConstraint(Pred, A, B, NewVariables);
         if (R.IsEq || R.empty() || !NewVariables.empty() || !R.isValid(Info))
           continue;
 

diff  --git a/llvm/test/Transforms/ConstraintElimination/signed-query-unsigned-system.ll b/llvm/test/Transforms/ConstraintElimination/signed-query-unsigned-system.ll
index a7fa432ad20e2..a78f175541587 100644
--- a/llvm/test/Transforms/ConstraintElimination/signed-query-unsigned-system.ll
+++ b/llvm/test/Transforms/ConstraintElimination/signed-query-unsigned-system.ll
@@ -149,7 +149,7 @@ define i1 @sge_neg_1_sge_0_known(i8 %a) {
 ; CHECK-NEXT:    [[A_NE_0:%.*]] = icmp sge i16 [[EXT]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[A_NE_0]])
 ; CHECK-NEXT:    [[T:%.*]] = icmp sge i16 [[EXT]], -1
-; CHECK-NEXT:    ret i1 [[T]]
+; CHECK-NEXT:    ret i1 true
 ;
   %ext = zext i8 %a to i16
   %a.ne.0 = icmp sge i16 %ext, 0