[PATCH] D134736: [DAG] select Cond, C, -1 --> or (sext (not Cond)), C when C is MVT::i1

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/X86/cmov-promotion.ll:124
 
 define i64 @cmov_zpromotion_32_to_64(i1 %c) {
 ; CMOV-LABEL: cmov_zpromotion_32_to_64:
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Some of these test need duplicating as we need to retain test coverage for the cases where cmov will still be used (i.e. the RHS select != -1) , but also keep these tests for the cmov-less coverage.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D134736/new/

https://reviews.llvm.org/D134736