[PATCH] D134736: [DAG] select Cond, C, -1 --> or (sext (not Cond)), C when C is MVT::i1

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix created this revision.
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In the spirit of D130765 <https://reviews.llvm.org/D130765> . Get rid of cbranches and/or cmov. Usually shorter, but sometime not, becaus eit's hard to prededict when dependency breaking xor will be introduced.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D134736

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/cmov-promotion.ll
  llvm/test/CodeGen/X86/pr16031.ll
  llvm/test/CodeGen/X86/select_const.ll
  llvm/test/CodeGen/X86/zext-sext.ll

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