[llvm] 3967abc - [RISCV] Add missing scheduler classes to Zbkb and Zbkx instructions.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-09-23T21:38:42-07:00
New Revision: 3967abcc0b839875af2cb13a74cc463fd5795ac3

URL: https://github.com/llvm/llvm-project/commit/3967abcc0b839875af2cb13a74cc463fd5795ac3
DIFF: https://github.com/llvm/llvm-project/commit/3967abcc0b839875af2cb13a74cc463fd5795ac3.diff

LOG: [RISCV] Add missing scheduler classes to Zbkb and Zbkx instructions.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    llvm/lib/Target/RISCV/RISCVSchedRocket.td
    llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
    llvm/lib/Target/RISCV/RISCVScheduleB.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
index 6604c8be2ddb..50ecd8b8da99 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
@@ -374,8 +374,10 @@ def BEXTI : RVBShift_ri<0b01001, 0b101, OPC_OP_IMM, "bexti">,
 // the draft bit manipulation specification they were included in. However, we
 // use the mnemonics given to them in the ratified Zbkx extension.
 let Predicates = [HasStdExtZbkx] in {
-def XPERM4 : ALU_rr<0b0010100, 0b010, "xperm4">, Sched<[]>;
-def XPERM8 : ALU_rr<0b0010100, 0b100, "xperm8">, Sched<[]>;
+def XPERM4 : ALU_rr<0b0010100, 0b010, "xperm4">,
+             Sched<[WriteXPERM, ReadXPERM, ReadXPERM]>;
+def XPERM8 : ALU_rr<0b0010100, 0b100, "xperm8">,
+             Sched<[WriteXPERM, ReadXPERM, ReadXPERM]>;
 } // Predicates = [HasStdExtZbkx]
 
 let Predicates = [HasStdExtZbb] in {
@@ -464,13 +466,13 @@ def ORC_B : RVBUnary<0b0010100, 0b00111, 0b101, OPC_OP_IMM, "orc.b">,
 
 let Predicates = [HasStdExtZbkb] in
 def BREV8 : RVBUnary<0b0110100, 0b00111, 0b101, OPC_OP_IMM, "brev8">,
-            Sched<[]>;
+            Sched<[WriteBREV8, ReadBREV8]>;
 
 let Predicates = [HasStdExtZbkb, IsRV32] in {
 def ZIP_RV32   : RVBUnary<0b0000100, 0b01111, 0b001, OPC_OP_IMM, "zip">,
-                 Sched<[]>;
+                 Sched<[WriteZIP, ReadZIP]>;
 def UNZIP_RV32 : RVBUnary<0b0000100, 0b01111, 0b101, OPC_OP_IMM, "unzip">,
-                 Sched<[]>;
+                 Sched<[WriteZIP, ReadZIP]>;
 } // Predicates = [HasStdExtZbkb, IsRV32]
 
 

diff  --git a/llvm/lib/Target/RISCV/RISCVSchedRocket.td b/llvm/lib/Target/RISCV/RISCVSchedRocket.td
index f39f7c71c23f..4bfd352edca3 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedRocket.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedRocket.td
@@ -244,5 +244,6 @@ defm : UnsupportedSchedZbb;
 defm : UnsupportedSchedZbc;
 defm : UnsupportedSchedZbs;
 defm : UnsupportedSchedZbkb;
+defm : UnsupportedSchedZbkx;
 defm : UnsupportedSchedZfh;
 }

diff  --git a/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td b/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
index 86d77e68b3c1..32e2b1f6d1e4 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
@@ -231,5 +231,6 @@ defm : UnsupportedSchedZbb;
 defm : UnsupportedSchedZbc;
 defm : UnsupportedSchedZbs;
 defm : UnsupportedSchedZbkb;
+defm : UnsupportedSchedZbkx;
 defm : UnsupportedSchedZfh;
 }

diff  --git a/llvm/lib/Target/RISCV/RISCVScheduleB.td b/llvm/lib/Target/RISCV/RISCVScheduleB.td
index b0947500fecc..324216df0380 100644
--- a/llvm/lib/Target/RISCV/RISCVScheduleB.td
+++ b/llvm/lib/Target/RISCV/RISCVScheduleB.td
@@ -34,10 +34,13 @@ def WriteSingleBit   : SchedWrite; // BCLR/BSET/BINV/BEXT
 def WriteSingleBitImm: SchedWrite; // BCLRI/BSETI/BINVI/BEXTI
 
 // Zbkb extension
+def WriteBREV8       : SchedWrite; // brev8
 def WritePACK        : SchedWrite; // pack/packh
 def WritePACK32      : SchedWrite; // packw
-def WritePACKU       : SchedWrite; // packu
-def WritePACKU32     : SchedWrite; // packuw
+def WriteZIP         : SchedWrite; // zip/unzip
+
+// Zbkx extension
+def WriteXPERM       : SchedWrite; // xperm4/xperm8
 
 /// Define scheduler resources associated with use operands.
 
@@ -67,10 +70,13 @@ def ReadSingleBit   : SchedRead; // BCLR/BSET/BINV/BEXT
 def ReadSingleBitImm: SchedRead; // BCLRI/BSETI/BINVI/BEXTI
 
 // Zbkb extension
+def ReadBREV8       : SchedRead; // brev8
 def ReadPACK        : SchedRead; // pack/packh
 def ReadPACK32      : SchedRead; // packw
-def ReadPACKU       : SchedRead; // packu
-def ReadPACKU32     : SchedRead; // packuw
+def ReadZIP         : SchedRead; // zip/unzip
+
+// Zbkx extension
+def ReadXPERM       : SchedRead; // xperm4/xperm8
 
 /// Define default scheduler resources for B.
 
@@ -134,14 +140,22 @@ def : ReadAdvance<ReadSingleBitImm, 0>;
 
 multiclass UnsupportedSchedZbkb {
 let Unsupported = true in {
+def : WriteRes<WriteBREV8, []>;
 def : WriteRes<WritePACK, []>;
 def : WriteRes<WritePACK32, []>;
-def : WriteRes<WritePACKU, []>;
-def : WriteRes<WritePACKU32, []>;
+def : WriteRes<WriteZIP, []>;
 
+def : ReadAdvance<ReadBREV8, 0>;
 def : ReadAdvance<ReadPACK, 0>;
 def : ReadAdvance<ReadPACK32, 0>;
-def : ReadAdvance<ReadPACKU, 0>;
-def : ReadAdvance<ReadPACKU32, 0>;
+def : ReadAdvance<ReadZIP, 0>;
+}
+}
+
+multiclass UnsupportedSchedZbkx {
+let Unsupported = true in {
+def : WriteRes<WriteXPERM, []>;
+
+def : ReadAdvance<ReadXPERM, 0>;
 }
 }