[PATCH] D133701: [llvm][AArch64] Explain why certain registers are reserved on Arm64EC

David Spickett via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 08:00:06 PDT 2022


DavidSpickett added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp:333
+      return std::string(AArch64InstPrinter::getRegisterName(PhysReg)) +
+             " is clobbered by asynchronous signals when using Arm64EC.";
+  }
----------------
This could be a little more precise, like: "when using Arm64EC (which you are)". "due to the Arm64EC ABI"? Not sure.

Ideas welcome if you think it's not clear enough as is.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133701/new/

https://reviews.llvm.org/D133701



More information about the llvm-commits mailing list