[PATCH] D133701: [llvm][AArch64] Explain why certain registers are reserved on Arm64EC

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 09:17:33 PDT 2022


efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp:333
+      return std::string(AArch64InstPrinter::getRegisterName(PhysReg)) +
+             " is clobbered by asynchronous signals when using Arm64EC.";
+  }
----------------
DavidSpickett wrote:
> This could be a little more precise, like: "when using Arm64EC (which you are)". "due to the Arm64EC ABI"? Not sure.
> 
> Ideas welcome if you think it's not clear enough as is.
Maybe "when building for Arm64EC"?  I don't think we need to be too concerned here; the reference to Arm64EC should make it obvious to anyone dealing with it.


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