[PATCH] D133701: [llvm][AArch64] Explain why certain registers are reserved on Arm64EC

[David Spickett via Phabricator via llvm-commits]

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This extends 4658366d95d5e398baad956225cc4ba339d5b037 <https://reviews.llvm.org/rG4658366d95d5e398baad956225cc4ba339d5b037> to add a note
explaining why the register is reserved.

note: x13 is clobbered by asynchronous signals when using Arm64EC.

I've added testing for w/x registers and v/q/s/d and h floating point
registers.

llvm will accept, but silently do nothing with, b registers. So they
are not tested here (clang rejects them so at least for C you're safe anyway).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D133701

Files:
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/test/CodeGen/AArch64/inline-asm-clobber-arm64ec.ll

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