[PATCH] D131959: [AMDGPU] Fix SDST operand of V_DIV_SCALE to always be VCC
Pierre van Houtryve via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 30 04:47:05 PDT 2022
Pierre-vh updated this revision to Diff 456614.
Pierre-vh marked 10 inline comments as done.
Pierre-vh added a comment.
Herald added a subscriber: gbedwell.
Herald added a reviewer: andreadb.
Fixing remaining issues.
I had to hack a bit the AsmParser to make it all fit together. I think InstAlias could be used to remove
the hack, I'll look into it
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D131959/new/
https://reviews.llvm.org/D131959
Files:
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/VOP3Instructions.td
llvm/lib/Target/AMDGPU/VOPInstructions.td
llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
llvm/test/CodeGen/AMDGPU/frem.ll
llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
llvm/test/CodeGen/AMDGPU/llvm.powi.ll
llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
llvm/test/CodeGen/AMDGPU/wave32.ll
llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
llvm/test/MC/AMDGPU/vop3.s
llvm/test/MC/AMDGPU/wave32.s
llvm/test/MC/AMDGPU/wave_any.s
llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt
llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s
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