[PATCH] D117499: [CodeGen] Support extracting fixed-length vectors from illegal scalable vectors

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> I had a look into using selects, but it doesn't work because when selecting between lo and hi parts you end up constructing a non-constant index for the hi part, i.e. IdxVal - LoNumElts (which is not a constant for scalable vectors). This leads to asserts because EXTRACT_SUBVECTOR is defined to only take constant indices.

You could handle the special case where the offset only points into the high vector if vscale is exactly 1.

Actually, more generally, if vscale is a power of two, there's exactly one value of vscale that would make the EXTRACT_SUBVECTOR point into the high vector: given a pair of index/vscale that points into the high vector, if vscale is smaller, it's UB, and if vscale is larger, it points into the low vector.  So we can construct an appropriate constant.  I guess we don't promise that vscale is a power of two in general, though.

If we allow for the possibility that vscale isn't a power of two, then yes, you'd need some sort of variable shuffle or load/store in general.

> I don't think we have to do anything special for i1 vectors because if the i1 type gets promoted (i.e. NEON), then we will end up down a different path where we extract individual elements from an illegal scalable vector, which is dealt with in SplitVecOp_EXTRACT_VECTOR_ELT. This is why in @extract_v4i1_nxv32i1_16 we end up spilling the input four times - once for each EXTRACT_VECTOR_ELT. If the i1 type is legal then presumably there will also be legal loads for them too.

The issue would be on a target where a type like v4i1 is legal.  i1 vectors are tightly packed in memory, so v1i1, v2i1, v4i1, and v8i1 are all one byte, so you can't just load the part you want.



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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:3039
+      SubVT, dl, Store, StackPtr,
+      MachinePointerInfo::getUnknownStack(DAG.getMachineFunction()));
 }
----------------
Missing alignment on the load op.


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