[PATCH] D130621: [RISCV] Add target feature to force-enable atomics

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 27 05:56:00 PDT 2022


nikic updated this revision to Diff 448017.
nikic retitled this revision from "[RISCV] Add target feature to force 32-bit atomics" to "[RISCV] Add target feature to force-enable atomics".
nikic edited the summary of this revision.
nikic added a comment.

Convert `+atomics-32` into `+forced-atomics`, which also works correctly on riscv64. Use a single predicate for `+forced-atomics` and `+a` when defining tablegen patterns.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130621/new/

https://reviews.llvm.org/D130621

Files:
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoA.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/forced-atomics32.ll
  llvm/test/CodeGen/RISCV/forced-atomics64.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D130621.448017.patch
Type: text/x-patch
Size: 33494 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220727/56c280a4/attachment-0001.bin>


More information about the llvm-commits mailing list