[PATCH] D129726: [InstCombine] (ShiftValC >> Y) >s -1/<s 0 --> Y != 0/==0

[Chenbing.Zheng via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8c124c908857: [InstCombine] (ShiftValC >> Y) >s -1/<s 0 --> Y != 0/==0 (authored by Chenbing.Zheng).

Changed prior to commit:
  https://reviews.llvm.org/D129726?vs=446070&id=446333#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129726/new/

https://reviews.llvm.org/D129726

Files:
  llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
  llvm/test/Transforms/InstCombine/icmp-shr.ll

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