[PATCH] D129726: [InstCombine] (ShiftValC >> Y) >s -1/<s 0 --> Y != 0/==0

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:2246
+    if (!IsAShr && ShiftValC->isNegative() &&
+        InstCombiner::isSignBitCheck(Pred, C, TrueIfSigned))
+      return new ICmpInst(TrueIfSigned ? CmpInst::ICMP_EQ : CmpInst::ICMP_NE,
----------------
We are inside of the "InstCombiner" namespace, so there is no reason to specify "InstCombiner::" explicitly.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129726/new/

https://reviews.llvm.org/D129726