[PATCH] D129927: [MachineScheduler] Try to issue the load instruction preferentially

[Allen zhong via Phabricator via llvm-commits]

Allen planned changes to this revision.
Allen added a comment.

Thank you for your suggestion, it is true that this unconditionally preferentially launch of the load instruction may be too aggressive.
Can you give me some guidance about the the function of "optimistic latency into the schedule latencies for loads code which function is", I can debug to see if a new solution can be used for improvement ?


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  https://reviews.llvm.org/D129927/new/

https://reviews.llvm.org/D129927