[PATCH] D129888: [RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X), C1)))

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

LGTM - thanks!



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Comment at: llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp:74
                               *DL)) {
-    IRBuilder<> Builder(ZExt);
-    Value *SExt = Builder.CreateSExt(Src, ZExt->getType());
+    auto *SExt = new SExtInst(Src, ZExt->getType(), "", ZExt);
     SExt->takeName(ZExt);
----------------
Changes to optimizeZExt should really be a separate patch


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129888/new/

https://reviews.llvm.org/D129888