[PATCH] D129888: [RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X), C1)))

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 17 11:06:55 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8cc483099a04: [RISCV] Teach RISCVCodeGenPrepare to optimize (i64 (and (zext/sext (i32 X)… (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D129888?vs=445070&id=445335#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129888/new/

https://reviews.llvm.org/D129888

Files:
  llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O3-pipeline.ll
  llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
  llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D129888.445335.patch
Type: text/x-patch
Size: 13909 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220717/9268f5d2/attachment.bin>


More information about the llvm-commits mailing list