[PATCH] D129735: [WIP][RISCV] Add new pass to transform undef to zero-init for vector values.
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 14 08:49:31 PDT 2022
frasercrmck added a comment.
In D129735#3652303 <https://reviews.llvm.org/D129735#3652303>, @kito-cheng wrote:
>> Sorry, I've not had time to think about this today. Just wanted to check: does this pass actually fix the test I added in D129639 <https://reviews.llvm.org/D129639>? Because that isn't (obviously) using undef input values, at least in the IR.
>
> Short answer is yes, but come with few more vmv.v.i instruction for prevent allocated same reg, `poison` and `undef` all turn into IMPLICIT_DEF in back-end.
Oh yeah, duh, I didn't notice the `poison` being inserted into! :) Thanks!
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https://reviews.llvm.org/D129735/new/
https://reviews.llvm.org/D129735
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