[PATCH] D129375: [AMDGPU] Fix bitcast v4i64/v16i16

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/bitcast-v4i64-v16i16.ll:30-31
+if.then69.3:                                      ; preds = %if.end76.2
+  %i11 = bitcast <4 x i64> %tmp.sroa.0.1.lcssa to <16 x i16>
+  store <16 x i16> %i11, <16 x i16> addrspace(1)* %out, align 32
+  unreachable
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Don't you need just this part and the other stores? Why the control flow?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129375/new/

https://reviews.llvm.org/D129375